Insights

Published in the DEC 2008, Vol 7 edition of the OCP-IP Newsletter (http://www.ocpip.org/). This article demonstrates how two key aspects of OCP "profiles and transactions" were adopted as fundamental building blocks for the architecture of a verification component targeted at constrained-random validation of OCP components and systems. ( Mark Litterick )

January 5, 2009

Articles

#OCP #SPECMAN

This paper describes the features and setup of one CI server (Jenkins) and how you can apply it to your design projects, with minimal effort. We consider both the technical and managerial challenges of using continuous integration. (JL Gray, Gordon McGregor )

February 29, 2012

Presentations

#CI #DVCON_US

This paper outlines the verification challenges created by some widely used low power design techniques, and shows how a digital verification methodology can be extended to existing testbenches, enabling low-power designs to be verified. ( Asif Jafri )

September 28, 2012

Presentations

#LOWPOWER #UPF #VERFICATION #SNUG

This paper provides an overview of the Kanban methodology and provides some insight into how it can be incorporated into a typical hardware development team's existing management structure. ( Bryan Morris )

December 11, 2012

Presentations

#AGILE #VERIFICATION #MTV

This paper offers solutions, techniques and practices for verification engineers to allow those unfamiliar with HVL technologies to be able to use, fine tune, and debug their environments intuitively. ( Anders Nordstrom , Alex Melikian )

December 11, 2012

Presentations

#VERIFICATION #SYSTEMVERILOG #OVM #MTV

This paper revisits the vertical reuse problem from a fresh standpoint and addresses the fundamental issues involved, provides a comprehensive set of pragmatic reuse guidelines and also suggests how to go about retrofitting reuse to existing block-level environments. ( Mark Litterick )

February 26, 2013

Presentations

#VERIFICAITON #DVCON_US

This paper provides examples of common verification problems that are susceptible to more than one approach, and explores solutions that are consistent with a proper verification mindset, while highlighting the risks associated with a more design-centric approach. ( Jeff Montesano , Mark Litterick )

March 4, 2014

Presentations

#VERIFICATION #DVCON_US

In this paper we will clarify the roles of CI and regression management, and provide a practical guide on how users can quickly deploy CI within their verification environment. ( Jason Sprott , André Winkelmann, Gordon McGregor, Paul Marriott )

March 5, 2014

Presentations

#SYSTEMVERILOG #CI #DVCON_US

The aim of this paper is to enable readers to do a better job of developing their coverage models, by understanding the objectives and requirements more clearly, using some best practice styling, and taking reviews of implementation more seriously. ( Jason Sprott , Paul Marriott , Matt Graham, Cadence Design Systems Inc. )

March 4, 2015

Presentations

#SYSTEMVERILOG #DVCON_US

This paper discusses practical examples and proposes pragmatic solutions for minimizing the risk and improving quality when using functional coverage. ( Mark Litterick )

March 4, 2015

Presentations

#SYSTEMVERILOG #DVCON_US #AWARD

This paper aims to enhance cross-discipline awareness by providing a comprehensive explanation of the problems that can arise in the physical implementation stages including a detailed analysis of timing intent for common synchronizer circuits. ( Mark Litterick )

March 1, 2016

Presentations

#SYSTEMVERILOG #CDC #DVCON_US

White Paper ( David Robinson )

November 1, 2005

Articles

#SPECMAN

CDNLive! June 2006, Nice, France ( David Robinson )

June 1, 2006

Presentations

#SPECMAN #CDNLIVE

An introduction to AOP in e. A sample chapter from the book. ( David Robinson )

June 21, 2006

Books

#SPECMAN #AOP

In this paper we will show how these mechanisms are used to create an automatic memoization macro for pure methods (in e, what is generally called a function is called a method, while function arguments are called parameters). ( Thorsten Dworzak )

May 9, 2013

Presentations

This paper presents a collection of e-language macros which will simplify the everyday programming tasks that many verification engineers inevitably face sooner or later. ( Thorsten Dworzak , Andre Winkelmann )

May 21, 2014

Presentations

#SPECMAN #CDNLIVE

This paper is related to previous work published at SNUG Europe 2005 called Utilizing Vera Functional Coverage in the Verification of a Protocol Engine for the FlexRayTM Automotive Communication System; readers are encouraged to read both papers. ( Mark Litterick )

July 1, 2005

Presentations

#SYSTEMVERILOG #SVA #DAC

This presentation demonstrates how to target SystemVerilog assertions for maximum effectiveness and return on effort. ( Mark Litterick )

November 1, 2005

Presentations

#SYSTEMVERILOG #SVA

This paper presents a pragmatic alternative methodology, using SystemVerilog Assertions in a simulation-based verification flow, to validate the correct operation and use of synchronizers while emulating the effects of CDC jitter in order to stress the functional operation of the rest of the device. ( Mark Litterick )

February 1, 2006

Presentations

#CDC #SYSTEMVERILOG #SVA #DVCON_US

This paper provides an overview of the problems related to gate-level timing and connectivity with a focus on how these affect the operation of the SVA code. ( Mark Litterick )

February 1, 2006

Presentations

#SYSTEMVERILOG #SVA #DVCON_US